1. Field of the Invention
The present invention relates to semiconductor memory device technology. More specifically, the present invention relates to a method for forming a floating gate in flash nonvolatile memory devices.
2. Description of the Related Art
Flash memory is widely used and known as a strong competitor to other nonvolatile memory devices, such as EPROMs and EEPROMs, and to some DRAM applications. The flash memory is capable of retaining the stored data without continued supply of electrical power, and typically has a stacked gate structure of a floating gate and a control gate. The floating gate, which is placed between the control gate and the semiconductor substrate, is isolated by a tunnel oxide layer. Electrons trapped into the floating gate modify the threshold voltage of the transistor. Electrons are trapped in the floating gate by Fowler-Nordheim tunneling or hot electron injection (HCI) through the tunnel oxide. Electrons are removed or erased from the floating gate by Fowler-Nordheim tunneling.
FIG. 1 is a cross-sectional view of a floating gate in conventional flash memory cell.
Referring to FIG. 1, the floating gate 13 is formed on a semiconductor substrate 10, which is interposed by a tunnel oxide layer 12. In the semiconductor substrate 10, an isolation layer 11 made by shallow trench isolation (STI) technique is formed. The isolation 10 defines active regions where microcircuit elements such as memory cells are to be formed. The STI isolation has been developed to replace the traditional local oxidation of silicon (LOCOS) isolation according to demands of miniaturization of integrated circuit devices.
When the floating gate is formed by using the STI technique, oxide thinning problem in interfaces between the active and isolation regions is inevitable. The oxide thinning causes an increase of leakage current to degrade the programming and reading characteristics of the memory devices.